Part Number Hot Search : 
ISL9222A 64HMY 74LVC57 BZX85B39 SD1732 1210M 9853A V375C
Product Description
Full Text Search
 

To Download MAC15N Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 MAC15M, MAC15N
Preferred Device
Triacs
Silicon Bidirectional Thyristors
Designed for high performance full-wave AC control applications where high noise immunity and high commutating di/dt are required.
http://onsemi.com Features
* * * * * * * * *
Blocking Voltage to 800 Volts On-State Current Rating of 15 Amperes RMS at 80C Uniform Gate Trigger Currents in Three Modes High Immunity to dv/dt - 250 V/ms minimum at 125C Minimizes Snubber Networks for Protection Industry Standard TO-220AB Package High Commutating di/dt - 9.0 A/ms minimum at 125C Operational in Three Quadrants, Q1, Q2, and Q3 Pb-Free Packages are Available*
TRIACS 15 AMPERES RMS 600 thru 800 VOLTS
MT2 G MT1
MARKING DIAGRAM
MAXIMUM RATINGS (TJ = 25C unless otherwise noted)
Rating Peak Repetitive Off-State Voltage (Note 1) (-40 to 125C, Sine Wave, 50 to 60 Hz, Gate Open) MAC15M MAC15N On-State RMS Current (Full Cycle Sine Wave, 60 Hz, TC = 80C) Peak Non-repetitive Surge Current (One Full Cycle Sine Wave, 60 Hz, TJ = 125C) Circuit Fusing Consideration (t = 8.3 ms) Peak Gate Power (Pulse Width 1.0 ms, TC = 80C) Average Gate Power (t = 8.3 ms, TC = 80C) Operating Junction Temperature Range Storage Temperature Range Symbol VDRM, VRRM 600 800 IT(RMS) ITSM 15 150 A A Value Unit V TO-220AB CASE 221A-09 STYLE 4 x A Y WW G = M or N = Assembly Location = Year = Work Week = Pb-Free Package MAC15xG AYWW 1 2
3
I2t PGM PG(AV) TJ Tstg
93 20 0.5 -40 to +125 -40 to +150
A2s W W 1 C C 2 3 4
PIN ASSIGNMENT
Main Terminal 1 Main Terminal 2 Gate Main Terminal 2
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. VDRM and VRRM for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded.
ORDERING INFORMATION
Device MAC15M MAC15MG MAC15N MAC15NG Package TO-220AB TO-220AB (Pb-Free) TO-220AB TO-220AB (Pb-Free) Shipping 50 Units / Rail 50 Units / Rail 50 Units / Rail 50 Units / Rail
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2005
Preferred devices are recommended choices for future use and best overall value.
1
December, 2005 - Rev. 2
Publication Order Number: MAC15M/D
MAC15M, MAC15N
THERMAL CHARACTERISTICS
Characteristic Thermal Resistance, Junction-to-Case Thermal ResistanceJunction-to-Ambient Maximum Lead Temperature for Soldering Purposes 1/8 from Case for 10 Seconds Symbol RqJC RqJA TL Value 2.0 62.5 260 Unit C/W C
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted; Electricals apply in both directions)
Characteristic OFF CHARACTERISTICS Peak Repetitive Blocking Current (VD = Rated VDRM, VRRM; Gate Open) ON CHARACTERISTICS Peak On-State Voltage (Note 2) (ITM = 21 A Peak) Gate Trigger Current (Continuous DC) (VD = 12 V, RL = 100 W) MT2(+), G(+) MT2(+), G(-) MT2(-), G(-) Hold Current (VD = 12 Vdc, Gate Open, Initiating Current = 150 mA) Latching Current (VD = 24 V, IG = 35 mA) MT2(+), G(+) MT2(+), G(-) MT2(-), G(-) Gate Trigger Voltage (VD = 12 V, RL = 100 W) MT2(+), G(+) MT2(+), G(-) MT2(-), G(-) DYNAMIC CHARACTERISTICS Rate of Change of Commutating Current; See Figure 10. (VD = 400 V, ITM = 6.0 A, Commutating dv/dt = 24 V/ms, Gate Open, TJ = 125C, f = 250 Hz, No Snubber) CL = 10 mF LL = 40 mH (di/dt)c 9.0 - - A/ms VTM - IGT 5.0 5.0 5.0 IH - IL - - - VGT 0.5 0.5 0.5 0.75 0.72 0.82 1.5 1.5 1.5 33 36 33 50 80 50 V 20 40 mA 13 16 18 35 35 35 mA 1.2 1.6 mA V TJ = 25C TJ = 125C IDRM, IRRM mA - - - - 0.01 2.0 Symbol Min Typ Max Unit
Critical Rate of Rise of Off-State Voltage (VD = Rated VDRM, Exponential Waveform, Gate Open, TJ = 125C) 2. Pulse Test: Pulse Width 2.0 ms, Duty Cycle 2%.
dv/dt
250
-
-
V/ms
http://onsemi.com
2
MAC15M, MAC15N
Voltage Current Characteristic of Triacs (Bidirectional Device)
+ Current Quadrant 1 MainTerminal 2 +
Symbol
VDRM IDRM VRRM IRRM VTM IH
Parameter
Peak Repetitive Forward Off State Voltage Peak Forward Blocking Current Peak Repetitive Reverse Off State Voltage Peak Reverse Blocking Current Maximum On State Voltage Holding Current Quadrant 3 MainTerminal 2 - IH VTM IRRM at VRRM on state IH
VTM
off state
+ Voltage IDRM at VDRM
Quadrant Definitions for a Triac
MT2 POSITIVE (Positive Half Cycle) +
(+) MT2
(+) MT2
Quadrant II
(-) IGT GATE MT1 REF
(+) IGT GATE MT1 REF
Quadrant I
IGT - (-) MT2 (-) MT2
+ IGT
Quadrant III
(-) IGT GATE MT1 REF
(+) IGT GATE MT1 REF
Quadrant IV
- MT2 NEGATIVE (Negative Half Cycle) All polarities are referenced to MT1. With in-phase signals (using standard AC lines) quadrants I and III are used.
http://onsemi.com
3
MAC15M, MAC15N
125 120 TC, CASE TEMPERATURE ( C) 115 110 = 180 = 30 and 60 = 90 = 120 20 PAV, AVERAGE POWER (WATTS) 18 16 14 12 10 8 6 4 2 0 2 6 8 10 12 IT(RMS), RMS ON-STATE CURRENT (AMP) 4 14 16 0 0 2 4 6 8 10 12 IT(RMS), ON-STATE CURRENT (AMP) 14 16 = 30 DC 180 120 90 60
105 100 95 90 85 80
DC
Figure 1. RMS Current Derating
Figure 2. On-State Power Dissipation
100
r(t), TRANSIENT THERMAL RESISTANCE(NORMALIZED)
1
TYPICAL AT TJ = 25C
MAXIMUM @ TJ = 125C
0.1
I T, INSTANTANEOUS ON-STATE CURRENT (AMP)
10
0.01
0.1
1
10
100 t, TIME (ms)
1000
1*10 4
Figure 4. Transient Thermal Response
MAXIMUM @ TJ = 25C 1
40
I H, HOLD CURRENT (mA)
MT2 POSITIVE
MT2 NEGATIVE
0.1
0
0.5 1 1.5 2 2.5 3 3.5 VT, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS)
4
5 -40
-10
20 50 80 TJ, JUNCTION TEMPERATURE (C)
110 125
Figure 3. On-State Characteristics
Figure 5. Hold Current Variation
http://onsemi.com
4
MAC15M, MAC15N
100 IGT, GATE TRIGGER CURRENT (mA) 1 VGT, GATE TRIGGER VOLTAGE (VOLT) OFF-STATE VOLTAGE = 12 V RL = 140 W
Q2
Q3 Q1
Q1 Q3 Q2
OFF-STATE VOLTAGE = 12 V RL = 140 W 1 -40 -10 20 50 80 TJ, JUNCTION TEMPERATURE (C) 110 125
0.5 -40
-10
+20 50 80 TJ, JUNCTION TEMPERATURE (C)
110
125
Figure 6. Typical Holding Current versus Junction Temperature
(dv/dt) c , CRITICAL RATE OF RISE OF COMMUTATING VOLTAGE(V/ s) dv/dt , CRITICAL RATE OF RISE OF OFF-STATE VOLTAGE(V/ s)
Figure 7. Gate Trigger Voltage versus Junction Temperature
5000 4K VD = 800 Vpk TJ = 125C
100
3K
10
TJ = 125C
100C
75C
2K
ITM tw VDRM f= 1 2 tw 6f ITM 1000
1K 0
(di/dt)c =
10
100 1000 10000 RG, GATE TO MAIN TERMINAL 1 RESISTANCE (OHMS)
1
10
20 30 40 50 60 70 80 90 100 (di/dt)c, RATE OF CHANGE OF COMMUTATING CURRENT (A/ms)
Figure 8. Critical Rate of Rise of Off-State Voltage (Exponential)
Figure 9. Critical Rate of Rise of Commutating Voltage
LL 200 VRMS ADJUST FOR ITM, 60 Hz VAC TRIGGER CHARGE CONTROL TRIGGER CONTROL MEASURE I
1N4007
CHARGE
- + MT2 1N914 51 W G MT1
200 V
NON-POLAR CL
Note: Component values are for verification of rated (di/dt)c. See AN1048 for additional information.
Figure 10. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Current (di/dt)c
http://onsemi.com
5
MAC15M, MAC15N
PACKAGE DIMENSIONS TO-220AB CASE 221A-09 ISSUE AA
-T- B
4
SEATING PLANE
F T S
C
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM A B C D F G H J K L N Q R S T U V Z INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.018 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 --- --- 0.080 MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.46 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 --- --- 2.04
Q
123
A U K
H Z L V G D N R J
STYLE 4: PIN 1. 2. 3. 4.
MAIN TERMINAL 1 MAIN TERMINAL 2 GATE MAIN TERMINAL 2
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: N. American Technical Support: 800-282-9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Phone: 81-3-5773-3850 Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
http://onsemi.com
6
MAC15M/D


▲Up To Search▲   

 
Price & Availability of MAC15N

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X